By Dr.-Ing. Ulrich Tietze, Dr.-Ing. Christoph Schenk (auth.)
In the sooner phases of built-in circuit layout, analog circuits consisted easily of variety 741 operational amplifiers, and electronic circuits of 7400-type gates. modern-day designers needs to choose between a miles higher and speedily expanding number of specific built-in circuits advertised via a dynamic and artistic undefined. basically through a formal choice from this wide selection can a cost-effective and aggressive answer be discovered to a given challenge. for every person case the dressmaker needs to make a decision which components of a circuit are most sensible carried out by means of analog circuitry, which by means of traditional electronic circuitry and which sections should be microprocessor managed. with the intention to facilitate this determination for the fashion designer who's now not accustomed to a majority of these matters, now we have prepared the booklet in an effort to crew the various circuits based on their box of program. every one bankruptcy is hence written to face by itself, with at the very least cross-references. To allow the reader to continue quick from an idea to a operating circuit, we speak about, for a wide number of difficulties, common ideas, the applicability of which has been proved by means of thorough experimental research. Our thank you are right here as a result of Prof. Dr. D. Seitzer for the availability of fine laboratory amenities. the topic is huge and the fabric awarded has needed to be constrained. therefore, we now have passed over simple circuit layout, in order that the publication addresses the complicated scholar who has a few again flooring in electronics, and the training engineer and scientist.
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43) A power series expansion up to the fourth order gives Ux I C 1 - I C 2 = IE ( 2 UT - Ux3) 24 Ui . 8 Analog multipliers 39 Inserting this in Eq. 45) gives, in connection with Eq. 35 UT~9mV, if the error is not to exceed 1 %. Because of the small value of Ux, the transistors TI and T2 must be closely matched to avoid drift of the offset voltage affecting the result. For the correct operation ofthe circuit, it is necessary that Uy is always negative while the voltage Ux may have either sign. Such a multiplier is called a two-quadrant multiplier.
On the other hand, the bandwidth of the resulting product should be as large as possible. 37 represents the block diagram of a time-division multiplier. The variable duty cycle is produced by a comparator which compares the input voltage U2 with the output voltage of a triangular voltage generator. The intervals t1 and t2 are shown in Fig. 38. With the equation for the triangular voltage u'o(t) = 40, __ 0 t T T for OStS- - 4 we obtain Fig. 37 Block diagram of a time-division multiplier 1 Linear and non-linear operational circnitry 36 Uolt) U2~~~----~~--------------------~----1------"__- - t1 - - - - - + - - - I T -~ ------------------ Fig.
The resistors Rs make the voltagecurrent characteristic of the FET more linear, as is described in reference . Their resistance must be kept high in comparison to the resistance of the input voltage divider. Voltage Uz must be positive to ensure negative feedback for the closedloop circuit. The FETs do not allow the implementation of bipolar coefficients. Therefore, Uy must always be negative so that the closed loop around OA 1 can balance, but voltage Ux may have either sign. In order to accomplish good accuracy, the FETs should be well matched over a wide range of resistances.
Advanced Electronic Circuits by Dr.-Ing. Ulrich Tietze, Dr.-Ing. Christoph Schenk (auth.)